FDS9435A
Single P-Channel Enhancement Mode Field Effect Transistor

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SO-8 P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer power management  and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
Symbol Parameter FDS8433A Units
VDSS Drain-Source Voltage -30 V
VGSS Gate-Source Voltage -20 V
ID Drain Current - Continuous (Note 1a)
- Pulsed
-5.3 A
-50
PD Power Dissipation for Single Operation (Note 1a)
(Note 1b)
(Note 1c)
2.5 W
1.2
1
TJ, Tstg Operating and Storage Junction Temperature Range -55 to +150 °C
-5.3 A, -30 V,  RDS(ON)= 0.045 W @ VGS = -10 V,               
                      RDS(ON)= 0.075 W @ VGS = - 4.5 V.
High density cell design for extremely low RDS(ON)
High power and current handling capability in a widely
used surface mount package.          

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Datasheet

Size: 244.91KB
Page: 8
PDF: FDS9435A.pdf
  • Description:
    Single P-Channel Enhancement Mode Field Effect Transistor
  • MFG:
    FAIRCHILD [Fairchild Semiconductor]
 

Abstract


May 1999


F DS94 35A
Single P -Channel Enhancement Mode Field Effect Transistor

GeneralDescription Features

Absolute Maximum Ratings T A = 25 o C unless otherwise noted
Symbol Parameter FDS9435A Units
V DSS Drain-Source Voltage -30 V
V GSS Gate-Source Voltage -20 V
I D Drain Current - Continuous (Note 1a) - 5.3 A
- Pulsed -50
P D Maximum Power Dissipation (Note 1a ) 2.5 W
(Note 1 b) 1.2
(Note 1c ) 1
T J ,T STG Operating and Storage Temperature Range -55 to 150 °C
THERMAL CHARACTERISTICS
R θJA Thermal Resistance, Junction-to-Ambient (Note 1a ) 50 °C/W
R θJC Thermal Resistance, Junction-to-Case (Note 1) 25 °C/W
FDS9435 A Rev.C
-5.3 A, -3 0 V, R DS(ON ) = 0.045 ? @ V GS = -10 V,
R DS(ON ) = 0.07 5 ? @ V GS = - 4.5 V.
High density cell design for extremely low R DS(ON) .
High power and current handling capability in a widely
used surface mount package.
SOT-23 SuperSOT T M -8 SOIC-16SO-8 SOT-223SuperSOT T M -6
SO-8 P -Channel enhancement mode power field effect
transistors are produced using Fairchild 's proprietary, high
cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance
and provide superior switching performance. These devices
are particularly suited for low voltage applications such as
notebook computer power management and other battery
powered circuits where fast switching, low in-line power loss,
and resistance to transients are needed.
S
D
SS
SO-8
D
D
D
G
pin 1
FDS
9435A
5
6
8
3
1
7
4
2
? 1999 Fairchild Semiconductor Corporation

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