MU9C2481L-10DC
LANCAM㈢ 1ST Family

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MU984 SOLID TANTALUM CHIP CAPACITORS
(T494 SERIES - Low ESR, Industrial Grade)
MU984A 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
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MU9C1240 SURFACE MOUNT RESISTOR CHIP LED LAMPS MU9C1240-50 3.3V / 2.5 Gbps InGaAs PIN-TIA Receiver
MU9C1240-50DC 83/84 - 5/8 Square 10-Turn MU9C1260 R-F Type Low Voltage 8-Bit Mask MCU
MU9C1260-DC 11.0-15.0 GHz 0.5 W Power Amplifier MU9C1260QAC Line Filament Lamps
MU9C1460-55DC VOLTAGE REGULATOR MU9C1480 AUTOMOTIVE RELAY
MU9C1480-10DC 5-Bit Microprocessor Power Supply Controller MU9C148012DC 6.4 Volt Temperature Compensated Zener Reference Diodes
MU9C1480-12DC IGBT MOSFET DRIVER MU9C1480-15DC
MU9C148090DC 32-Tap Digitally Programmable Potentiometer MU9C1480-90DC Dual Precision Retriggerable/Resettable Monostable Multivibrator
MU9C1480A Silicon Power Rectifier Assemblies Plate Heatsink MU9C1480A-12DC Single +5V, Fully Integrated, 1.25Gbps Laser Diode Driver

Datasheet

Size: 111.93KB
Page: 20
PDF: MU9C2481L-10DC.pdf
  • Description:
    LANCAM㈢ 1ST Family
  • MFG:
    MUSIC [MUSIC Semiconductors]
 

Abstract


LANCAM
fi
1
ST
Family
MUSIC Semiconductors, the MUSIC logo, LANCAM, and the phrase “MUSIC Semiconductors” are
registered trademarks of MUSIC Semiconductors. MUSIC is a trademark of MUSIC
Semiconductors. Certain features of this device are patented under U.S. Patent 5,383,146.
1 October 1998 Rev. 1a
Block Diagram
DISTINCTIVE CHARACTERISTICS
Preliminary Data Sheet
High density content-addressable memory
(CAM) family
2K (2481L), 4K (4481L), and 8K (8481L) words
64-bit per word memory organization
Fast 100 ns compare speed
MUSIC’s patented CAM/RAM partitioning
Powerful LANCAM instruction set
16-bit I/O
3.3 volt operation
44 pin PLCC
FEATURES AND BENEFITS
Full compatibility among all LANCAM 1
ST
devices, allowing CAM density variations
within any application
Full CAM technology for simplicity and
speed: one single cycle to find, learn, or
delete an entry
3.3 volt operation for low power dissipation
Powerful LANCAM instruction set for
application flexibility
Partionable CAM/RAM array for associated
data storage
Low cost per entry for cost sensitive
applications
ADDRESS/W
/E
/CM
DQ (15–0) (16)
I/
O
B
U
F
F
E
R
S
CONTROL
CAM ARRAY
2
N
WORDS
X 64 BITS
COMPARAND
MASK 1
MASK 2
2
N
x
2
V
A
LI
D
I
TY
BI
TS
P
R
I
O
R
I
T
Y
E
NCO
DE
R
COMMANDS & STATUS
N
MUX
DATA (16) DEMUX
SOURCE AND
DESTINATION
SEG MENT
COUNTERS
VCC
GND
INSTRUCTION (W/O)*
NEXT FREE AD DRESS (R/O )
CONTROL
SEGMENT CONTROL
ADDRESS
STATUS (15–0) (R/O)*
STATUS (31–16) (R/ O)
REGISTER SET
2
MATCH ADDR, /MF
/MM, /FF
DATA (16)
(16)
DATA (64)
DATA (64)
A
D
D
R
ESS D
E
C
O
D
E
R
/RESET
/MF
/FF
N+1

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