NDS9956A
Dual N-Channel Enhancement Mode Field Effect Transistor

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These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as DC/DC conversion and DC motor control where fast switching, low in-line power loss, and resistance to transients are needed.

Symbol Parameter NDS9956A Units
VDSS Drain-Source Voltage 30 V
VGSS Gate-Source Voltage ± 20 V
ID Drain Current - Continuous (Note 1a)
- Pulsed
± 3.7 A
± 15
PD Power Dissipation for Dual Operation 2 W
Power Dissipation for Single Operation (Note 1a)
(Note 1b)
(Note 1c)
1.6
1
0.9
TJ,TSTG Operating and Storage Temperature Range -55 to 150
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 ℃/W
RθJC Thermal Resistance, Junction-to-Case (Note 1) 40 ℃/W
·3.7A, 30V. RDS(ON) = 0.08Ω @ VGS = 10V
·High density cell design for extremely low RDS(ON).
·High power and current handling capability in a widely used surface mount package.
·Dual MOSFET in surface mount package.

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Datasheet

Size: 341.13KB
Page: 10
PDF: NDS9956A.pdf
  • Description:
    Dual N-Channel Enhancement Mode Field Effect Transistor
  • MFG:
    FAIRCHILD [Fairchild Semiconductor]
 

Abstract


February 1996
NDS9956A
Dual N-Channel Enhancement Mode Field Effect Transistor


General Description Features
________________________________________________________________________________

Absolute Maximum Ratings TA= 25°C unless otherwise noted
Symbol Parameter NDS9956A Units
VDSS Drain-Source Voltage 30 V
VGSS Gate-Source Voltage ± 20 V
ID Drain Current - Continuous (Note 1a) ± 3.7 A
- Pulsed ± 15
PD Power Dissipation for Dual Operation 2 W
Power Dissipation for Single Operation (Note 1a) 1.6
(Note 1b) 1
(Note 1c) 0.9
TJ,TSTG Operating and Storage Temperature Range -55 to 150 °C
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
RθJC Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W
NDS9956A.SAM
1
5
6
7
8
4
3
2
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance,
provide superior switching performance, and withstand high
energy pulses in the avalanche and commutation modes.
These devices are particularly suited for low voltage
applications such as DC/DC conversion and DC motor
control where fast switching, low in-line power loss, and
resistance to transients are needed.
3.7A, 30V. RDS(ON) = 0.08? @ VGS = 10V
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
Dual MOSFET in surface mount package.
? 1997 Fairchild Semiconductor Corporation

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